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zeige Details Lehmann, Torsten, Bruun, Erik, ... Mixed analog/digital matrix-vector multiplier for neural network synapses
in: Analog integrated circuits and signal processing , ISSN 1573-1979, Vol. 9 (1. 1996), p. 55-63
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1996
Abstract In this work we present a hardware efficient matrix-vector multiplier architecture for artificial neural networks with digitally stored synapse strengths. We present a novel technique for manipulating bipolar inputs based on an analog two's complements method and an accurate current rectifier/sign detector. Measurements on a CMOS test chip are presented and validates the techniques. Further, we propose to use an analog extension, based on a simple capacitive storage, for enhancing weight resolution during learning. It is shown that the implementation of Hebbian learning and back-propagation learning in this system is possible using very little additional hardware compared to the recall mode system.
Copyright: Copyright 1996 Kluwer Academic Publishers
beteiligte Personen: Lehmann, Torsten , Bruun, Erik , Dietrich, Casper
Format: Elektronisch
Erschienen: 1996.
Serie: Springer Online Journal Archives 1860-2000 [Dig. Serial]
Schlagwörter:
URL: http://dx.doi.org/10.1007/BF00158852

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